1. Field of the Invention
The present invention relates to a two-terminal current regulator, and more particularly to a two-terminal current regulator which exhibits a high precision constant current characteristic to a power supply voltage variation.
2. Description of the Prior Art
In the past, a two-terminal current regulator which utilizes a drain current versus drain-source voltage characteristic of a junction type field effect transistor has been used, but it has a problem in that a constant current characteristic of an output current to a power supply voltage variation is poor.
FIG. 1 shows a circuit diagram of a prior art two-terminal current regulator which uses the junction type filed effect transistor. It is utilized in a circuit, for example, disclosed in U.S. Pat. No. 4,071,823 to T. Okayama issued on Jan. 31, 1978. Numeral 7 denotes a junction type field effect transistor (FET) having a drain thereof connected to a positive output terinal of a D.C. power supply 6, a gate and a source thereof connected together, the source being connected through a load 5 to a negative output terminal of the D.C. power supply 6. FIG. 2 shows an example of a drain current I.sub.D versus drain-source voltage V.sub.DS characteristic of the junction type FET of FIG. 1, with a gate-source voltage V.sub.GS being a parameter. An ordinate represents the drain current and an abscissa represents the drain-source voltage. As seen from FIG. 2, in a saturation region, the drain current can be maintained relatively constant to the variation of the voltage applied across the drain and the source by keeping the gate-source voltage V.sub.GS at a constant level, for example, 0 volt. Accordingly, a constant current can be supplied to the load 5 of FIG. 1. The constant current charactristic of the current regulator which uses the FET is determined by a gradient of the drain current I.sub.D versus drain-source voltage V.sub.DS characteristic of the FET used, that is, I.sub.D / V.sub.DS in FIG. 2, and the constant current characteristic is poor.
On the other hand, a prior art three-terminal current regulator exhibits a good constant current characteristic but has several problems.
FIG. 3 shows a diagram for explaining a principle of the prior art three-terminal current regulator. A load 5 is connected between a positive output terminal of an external non-stabilized D.C. power supply 6 and a terminal 8 of a three-terminal constant current circuit. A current controller 3 including a PNP transistor and a sensing resistor 4 are connected in series between the terminal 8 and a terminal 9. The terminal 9 is connected to a negative output terminal of the external power supply 6. One input terminal of an error amplifier 2 is connected to the sensing resistor 4 and the other input terminal is connected to an output terminal of a reference voltage generator 1, and an output terminal of the error amplifier 2 is connected to an input terminal of the current controller 3. A terminal 10 is connected to the positive output terminal of the D.C. power supply 6. The reference voltage generator 1 and the error amplifier 2 are powered from the D.C. power supply 6 through the terminals 10 and 9 of the three-terminal current regulator. The reference voltage generator 1 generates a constant voltage of a predetermined voltage level. The error amplifier 2 compares the reference voltage with a voltage developed across the sensing resistor 4 when a current flowing in the load 5 flows through the sensing resistor 4 and controls the current controller 3 such that a difference between those voltages is rendered zero in order to maintain the current in the load 5 at a constant level.
The three-terminal current regulator described above exhibits a good constant current characteristic but the currents flowing in the reference voltage generator 1 and the error amplifier 2 and hence a sum current thereof I.sub.SUPPLY are not regulated. Thus, if the external D.C. power I.sub.SUPPLY 6 varies, the current I.sub.SUPPLY also varies. It also varies with the variation of an ambient temperature. In addition, the load 5 must always be connected between to positive output terminal of the D.C. power supply 6 and the terminal 8 and hence the position of the load 5 is limited.